FK20 CUDA
fr_add.cuh File Reference
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Macros

#define FR_ADD(Z, X, Y)
 Device macro for Z = X+Y with overflow check. More...
 

Macro Definition Documentation

◆ FR_ADD

#define FR_ADD (   Z,
  X,
  Y 
)
Value:
/* z = x + y */ \
\
"\n\tadd.u64.cc "#Z"0, "#X"0, "#Y"0;" \
"\n\taddc.u64.cc "#Z"1, "#X"1, "#Y"1;" \
"\n\taddc.u64.cc "#Z"2, "#X"2, "#Y"2;" \
"\n\taddc.u64.cc "#Z"3, "#X"3, "#Y"3;" \
"\n\taddc.u32 t4, 0, 0;" \
\
/* if z >= 2^256 then z -= rmmu0 */ \
\
"\n\tsetp.ne.u32 nz, t4, 0;" \
"\n@nz\tsub.u64.cc "#Z"0, "#Z"0, 0xFFFFFFFE00000002U;" \
"\n@nz\tsubc.u64.cc "#Z"1, "#Z"1, 0xA77B4805FFFCB7FDU;" \
"\n@nz\tsubc.u64.cc "#Z"2, "#Z"2, 0x6673B0101343B00AU;" \
"\n@nz\tsubc.u64.cc "#Z"3, "#Z"3, 0xE7DB4EA6533AFA90U;" \
"\n@nz\tsubc.u32 t4, t4, 0;" \
\
/* if z >= 2^256 then z -= rmmu0 */ \
\
"\n\tsetp.ne.u32 nz, t4, 0;" \
"\n@nz\tsub.u64.cc "#Z"0, "#Z"0, 0xFFFFFFFE00000002U;" \
"\n@nz\tsubc.u64.cc "#Z"1, "#Z"1, 0xA77B4805FFFCB7FDU;" \
"\n@nz\tsubc.u64.cc "#Z"2, "#Z"2, 0x6673B0101343B00AU;" \
"\n@nz\tsubc.u64.cc "#Z"3, "#Z"3, 0xE7DB4EA6533AFA90U;"
__managed__ fr_t Y[512 *512]
Definition: g1test_fft.cu:15
__managed__ fr_t Z[512 *512]
Definition: g1test_fft.cu:15
__managed__ fr_t X[512 *512]
Definition: g1test_fft.cu:15

Device macro for Z = X+Y with overflow check.

Parameters
[out]Zdestination register
[in]Xfirst operand
[in]Ysecond operand
Returns
void

Definition at line 14 of file fr_add.cuh.